Significance of the Study
Introduction:
The Transformation of the 1st Generation of Gaming Consoles had evolved from Atari 1979 Operating System, NES CPU Microprocessors, Sega Mega Drive the breakthrough of the Saturn System was a stepping Stone as well as Nintendo 64 and PlayStation 1 to the present Gaming Console which is a Modern Day CPU Operating System.
The Sega Saturn is a 32-bit home video game console launched in Japan in 1994 and North America in 1995. Its history is marked by a rushed and poorly communicated 1995 North American launch that alienated retailers and was overshadowed by the upcoming Sony PlayStation, a complex hardware design that made development difficult, and a limited third-party game selection, particularly outside of Japan. Despite its commercial struggles, the Saturn was supported by a dedicated fanbase for its library of notable games.
Like the PlayStation 1 the Sega Saturn 32, microprocessor chip was RISC.
The Nature of Programming language was oddly not C++ Standard Libraries but Standard C programming that was read back and forth from Assembly Language or Machine Code of the RISC Microprocessor Chip.
Neo Geo was a breakthrough of Memory Storage adapting a Memory Card but the Saturn System’s CD memory storage. modernized the Latest Generation of Game Consoling.
Chapter Review:
The Sega Saturn’s architecture was a complex system centered on two Hitachi SH-2 CPUs, two video processors (VDP1 and VDP2), and a Motorola 68000 CPU for sound. Its dual-CPU setup made 3D development challenging, especially when compared to its competitor, the PlayStation, while its two video processors handled 2D and 3D tasks differently. VDP1 was designed for sprites and polygons, while VDP2 handled backgrounds and scrolling, making the console’s 2D capabilities particularly strong.
Main components
- CPUs: The system featured two Hitachi SH-2 CPUs running at 28.6 MHz for general processing, supplemented by a Motorola 68000 CPU running at 11.3 MHz for sound control to prevent bottlenecks.
- Video Processors (VDPs):
- VDP1: Handled sprites and polygons, using a technique based on quadrilaterals which gave many 3D games a “boxy” appearance. It was capable of scaling and rotating polygons.
- VDP2: Managed 2D backgrounds, allowing for multiple layers of independent scrolling, 3D rotating backgrounds, and various effects like water and fire.
- Sound: The system included a dedicated sound processor (SCSP) with 32 channels, capable of producing audio through PCM, FM, MIDI, and LFO formats.
- Memory: The Saturn had a complex memory setup, including 12 megabits of system RAM and 12 megabits of video RAM.
1.1 The Saturn System
The three buses and major components of the Saturn system
· SH-2 CPUs. The main processor is a 28-MHz Hitachi 32-bit RISC chip
(SH-2) that uses a second SH-2 as a “slave CPU” to speed processing of
calculations such as matrix transformations. Both SH-2s have access to
1.5 MB of synchronous DRAM (labeled Work RAM in Figure 1-1).
· System Control Unit (SCU). Includes a programmable DSP, a DMA, and a
bus controller that transparently translates addresses specified by the SH-2s
into appropriate control signals for the other buses.
· CD-ROM subsystem. Includes a 20-MHz Hitachi SH-1 processor and an
optional MPEG decompression chip, which if present connects directly to the
video and sound subsystems.
· Video subsystem. VDP 1 plots parts (including textured parts) and supports
15-bit color. VDP 2 can plot up to five backgrounds simultaneously and
supports 15-bit or 24-bit color. VDP 1 uses a dual frame buffer that allows it
to plot a new frame while the previously plotted frame is being displayed,
permitting display at 60 frames per second or at slower rates that divide
evenly into 60 frames per second.
· Sound subsystem. Includes a custom SCSP chip that combines a PCM/FM
sound source and sound-exclusive DSP, and a 68EC000 that runs at 11.3 MHz
and can be programmed for 3-D sound and other effects.
You can program both SH-2s, the SCU DSP, the SCSP DSP, and the 68EC000 to
achieve simultaneous processing of different kinds of data. For example, Saturn
can play up to 32 sounds while calculating transformations of 3-D models and
displaying the resulting 2-D sprites in real time.
1.2 System Control Unit (SCU)
The SCU is built around a Harvard-architecture digital signal processor (DSP), a bus
controller, and a direct memory access (DMA) chip. The bus controller translates
addresses specified by the SH-2 CPU on the system bus into appropriate control
signals for the other buses. This allows the SCU to integrate the A bus and B bus
memory and processors into one large SH-2 memory map.
The SCU’s DSP has a small program area in its RAM and some multiplication units.
These can be useful for tasks such as 3-D transformations. For example, you can load
a program into the DSP that performs a coordinate transformation for rotating an
object. When you need to rotate that object, you send the matrix of vertices you want
to multiply through the DMA with a command that runs the program in the DSP for
each vertex. The resulting transformed matrix of vertices ends up wherever the
DMA is sending it, in this case VDP 1’s VRAM.
You must load any program you want to use into the DSP; it doesn’t contain any
hard-wired programs. Sega provides libraries of programs that perform matrix
calculations and other common tasks.
The work RAM on the system bus can also be controlled via the SCU. This allows
DMA between any parts of memory without involving the SH-2 CPU. For example,
you can DMA from work RAM to VDP 1’s VRAM or from the cartridge port ROM
to VDP 2’s RAM. For an overview of the system memory map, see “Memory
Configuration”
1.3 System Manager and Peripheral Control (SMPC)
The SMPC is built around a 4-bit single-chip Hitachi microcontroller that controls a
real-time clock and can reset either the entire system or individual microprocessors
(SH-2, SH-1, 68EC000, and SCSP). The SMPC also controls nonmaskable interrupts
sent to the SH-2 and via the SCU to the 68EC000, SCSP, VDP 1, and VDP 2. This
capability permits the SH-2, for example, to interrupt the 68EC000’s processing to
request that it play a particular sound. The SMPC runs continuously and is powered
by a battery when the system is off.
The SMPC handles all input and output using one of two modes. In direct mode, the
SH-2 CPU can access the peripheral directly. In indirect mode, the SMPC regularly
polls for and buffers the latest information from a variety of peripheral devices,
including the eight-button Saturn controller and other devices that use a 4-bit
parallel protocol, three-line handshake devices, serial devices, and Genesis
controllers like the six-button controller, the mouse, and the Genesis team player.
1.4 SH-2 CPUs
The main CPU for the Saturn system is an SH-2 microprocessor with a twin “slave”
SH-2. Both chips run at 28 MHz. Because they are on a single system bus, one has to
wait for the other if they both need to access the work RAM or anything else on the
bus at the same time. However, each SH-2 includes cache RAM that you can
configure either as a 4-KB 4-way write-through unified cache or as a 2-KB 2-way
write-through unified cache plus 2 KB of RAM for use as private work RAM.
The Saturn comes with the main SH-2’s cache RAM configured as a 4-KB 4-way
cache and the slave SH-2’s cache RAM configured as a 2-KB two-way cache with
2 KB of additional RAM.
1.5 Cart port
The cartridge port has 32 MB available in the system memory map. You can plug the
CartDev system module directly into the cartridge port and perform debugging and
other tasks via a SCSI connection with a personal computer.
1.6 CD-ROM subsystem
The CD-ROM subsystem is an independent device with its own SH-1 processor, a
“2x” CD drive that reads data at 300 KB/sec, and a 512-KB data cache. It reads
CD+G, CD Red book (audio CD), CD Yellow book (CD-ROM), and CDX-A formats.
Memory configuration
The SCU integrates the A bus and B bus memory and processors into one large SH-2
memory map. The SH-2 doesn’t need to process additional instructions to access the
multiplexed B bus. Instead, the SCU translates signals as necessary to provide
transparent access to the entire system. You can access all memory and devices via
the SH-2 memory map.
The SCU uses the 25-bit SH-2 address bus and four SH-2 chip selects to create the
four 32-MB areas shown in Figure 1-2. These four areas represent the entire SH-2
memory map. The IPL ROM occupies a small portion of CS0, the SCU uses CS1 and
CS2, and CS3 is SDRAM.
1.7 Programming tools
Sega provides a standard GNU C compiler that has been modified to work with the
SH-2 CPU. GNU supports registerized parameters–that is, it allows you to refer to
up to four registers directly; other parameters are on the stack.
Hitachi provides an assembler, a C compiler, a link editor, and a librarian that you
can use to compile and link assembly and C files. You can also use other third-party
assemblers to compile and link assembly files. Typically, these assemblers provide a
debugger, a linker, and a command-line DOS interface that requires a DOS extender.
If you wish, you can write some parts of your program in C using the GNU compiler
and other parts in assembly language using a third-party assembler, then link both
the GNU C modules and the assembly files and output C files in the COFF file
format.
High-level languages vs. assembler
You can use assembly language or high-level languages such as C to write Saturn
programs. Because the SH-2 chips are RISC, assembly-language programming for
Saturn can be more complex than for other game machines. For example, you must
deal with pipelining if you write in assembly language. This means development in
assembly language may take longer than development in a high-level language.
Although the GNU C compiler provided by Sega may produce less efficient code in
some circumstances than an assembler, it takes care of many of the complexities of
RISC programming, such as pipelining, automatically. Hand-crafted assembly code
can be useful in situations where slight performance improvements are significant,
but compiled C code works just as well for many tasks.